Integrated circuits may be subject to different types of security attacks. For example, application processor chips used to play content files (e.g., video files, music files, etc.) may be hacked by users seeking access to protected or proprietary content. For example, a hacker may wish to gain access to protected content (e.g., content that is protected by digital rights management (DRM), such as copyrighted audio or video files that are intended to be sold to a user). After gaining access to the protected content, a successful hacker may also be able to copy and/or distribute this video/audio content to others in contravention to security controls placed on the content file. Such security controls may be used by an owner of the content file (e.g., a record label, movie studio, content distribution company, etc.) to prevent access to or unauthorized copying and distribution of the file.
One of the ways to protect a content file from unauthorized access, copying, and distribution is to encrypt the file using an encryption standard such as data encryption standard (DES) encryption, triple DES (3DES) encryption or advanced encryption standard (AES). By using a DES, 3DES or AES encryption key known only to an authorized entity and the processor chip, it can be assured that only an authorized chip can decode the content properly. Encryption using DES, 3DES or AES may also protect the content from a hacker trying to peek at the data using a logic analyzer at the chip-memory interface or removing the memory from board and examining it separately. However, DES, 3DES or AES decryption algorithms suffer from latencies induced in a pipeline to the processor, which substantially reduce throughput of content on the processor chip. For example, typical encryption algorithms tend to take 10's of clock cycles to complete one encryption operation, and typical DES, 3DES or AES decryption algorithms can require many processor cycles (e.g., 16 or more cycles) to encrypt or decrypt a block of data. Thus, when writing protected data to a volatile memory (e.g., a random access memory), because a memory encryption unit that performs the encryption needs to encrypt each memory access, an encryption algorithm that requires more than 1 or 2 clock cycles can impose a burdensome penalty on the processing of the data.
In addition to latency problems associated with performing an encryption algorithm, block size is another important aspect of any encryption system. Block size is the minimum fixed length string of bits on which an encryption algorithm works. DES, for example, has a block size of 64-bits. Most microprocessors support memory accesses on 8-bit boundaries, i.e. 8-bits, 16-bits, 32-bits, 64-bits and so on. If the block size of memory encryption is greater than 8-bits (e.g., 32-bit encryption or 64-bit encryption), then every write transaction that is smaller than the block size, must go through a read-decrypt-modify-encrypt-write cycle, which impedes throughput and increases power consumption of the system.